RISC-V Software News

Spec Repository Activity

Notable Changes

• riscv, bpf: Add 12-argument support for RV64 bpf trampoline (and 2 more) (6801b0aef7, Pu Lehui)
• riscv: Introduce vendor variants of extension helpers (and 2 more) (0f24254111, Charlie Jenkins)
• ACPI: RISCV: Add NUMA support based on SRAT and SLIT (eabd9db64e, Haibo Xu)
• riscv: Optimize crc32 with Zbc extension (a43fe27d65, Xiao Wang)
• riscv: Add Zawrs support for spinlocks (b8ddb0df30, Christoph Müllner)
• riscv: cpufeature: Extract common elements from extension checking (d4c8d79f51, Charlie Jenkins)
• RISC-V: ACPI: Enable SPCR table for console output on RISC-V (38738947db, Sia Jee Heng)
• mm: implement update_mmu_tlb() using update_mmu_tlb_range() (8f65aa3223, Bang Li)
• riscv: dts: starfive: add PCIe dts configuration for JH7110 (2904244a8c, Minda Chen)
• trace: riscv: Remove deprecated kprobe on ftrace support (3308172276, Jinjie Ruan)
• riscv: hwprobe: export highest virtual userspace address (c9b8cd139c, Clément Léger)
• riscv: stacktrace: fix usage of ftrace_graph_ret_addr() (393da6cbb2, Puranjay Mohan)
• riscv: dts: add clock generator for Sophgo SG2042 SoC (b1240a3951, Chen Wang)
• mm: provide mm_struct and address to huge_ptep_get() (e6c0c03245, Christophe Leroy)
• riscv: Add tracepoints for SBI calls and returns (56c1c1a09a, Samuel Holland)

Notable Changes

• lib: utils/fdt: Add support for parsing riscv,isa-extensions (f7a92f6b67, Conor Dooley)
• lib: sbi: Introduce an early console buffer for caching early prints (and 3 more) (bb7267a07f, Anup Patel)
• include: sbi: Add macros to create FIFO as local or global variable (d35c76a766, Anup Patel)
• .github: Add repo lockdown GitHub workflow and update .gitignore (c531adbf08, Dongdong Zhang)
• scripts/carray.sh: Add comment to generated files (75ad25ab59, Ivan Orlov)
• lib: tests: add math test suite (b7e7e66026, Dongdong Zhang)
• lib: tests: enhance test output with colored pass/fail messages (c5c1d04346, Dongdong Zhang)
• lib: sbi_hsm: Save/restore menvcfg only when it exists (4afb57c9eb, Samuel Holland)
• platform: Setup serial console device in early_init() (9e8a18fd0d, Anup Patel)
• lib: sbi_emulate_csr: Do not log illegal CSR accesses (d8608e615f, Samuel Holland)
• Makefile: change to using .carray.c for carray files (fd9e8b17ed, Ben Dooks)
• docs: writing tests: update cleaning instructions (0a66754295, Ivan Orlov)
• Makefile: remove any .carray.c during clean (1ede0cab0e, Ben Dooks)

Notable Changes

• target/riscv: Add cycle & instret privilege mode filtering support (and 2 more) (b54a84c15e, Kaiwen Xue)
• disas/riscv: Add decode for Zawrs extension (4d46d84ea7, Balaji Ravikumar)
• target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation (4f7b1ecba8, Peter Maydell)
• hw/riscv/virt-acpi-build.c: Add namespace devices for PLIC and APLIC (a54dd0cd6b, Sunil V L)
• target/riscv: Expose zabha extension as a cpu property (and 7 more) (8aebaa2591, LIU Zhiwei)
• disas/riscv: Support zabha disassemble (and 2 more) (ae4bdcef6f, LIU Zhiwei)
• target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR (38c83e8d3a, Yu-Ming Chang)
• target/riscv: More accurately model priv mode filtering. (and 2 more) (74112400df, Rajnesh Kanwal)
• hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART (faacd2e6b6, Sunil V L)
• hw/riscv/virt.c: re-insert and deprecate 'riscv,delegate' (38facfa843, Daniel Henrique Barboza)
• target/riscv: Expose the Smcntrpmf config (and 6 more) (6f6592d62e, Atish Patra)
• target/riscv/kvm: update KVM regs to Linux 6.10-rc5 (3cb9f20499, Daniel Henrique Barboza)
• target/riscv: Validate the mode in write_vstvec (910c18a917, Jiayi Li)
• target/riscv: Simplify probing in vext_ldff (3f57638a7e, Richard Henderson)
• target/riscv: Restrict semihosting to TCG (10425887ba, Philippe Mathieu-Daudé)

Notable Changes

• [RISCV] Implement Intrinsics Support for XCValu Extension in CV32E40P (#85603) (56f0ecd6db, realqhc)
• [RISCV] Teach fillUpExtensionSupportForSplat to handle nxvXi64 VMV_V_X_VL on RV32. (#99251) (d85f1054fb, Craig Topper)
• [RISCV] Add missing CHECK prefix to fixed-vectors-vfw-web-simplification.ll. NFC (deb40a253a, Craig Topper)
• [RISCV][LoopIdiomVectorize] Support VP intrinsics in LoopIdiomVectorize (#94082) (8b55d342b6, Min-Yih Hsu)
• [RISCV] Add capital letters to T-Head extension names in descriptions. (#99070) (e8ab413259, Craig Topper)
• [RISCV] Add -m[no-]scalar-strict-align and -m[no-]vector-strict-align. (#95024) (73acf8d755, Craig Topper)
• [RISCV][MC] Add support for hardcode encoding of .insn directive (#98030) (2a086dce69, Yingwei Zheng)
• [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (#83112) (6441df3b59, realqhc)
• [RISCV] Don't crash in RISCVMergeBaseOffset if INLINE_ASM uses address register in a non-memory constraint. (#100790) (c901b739b6, Craig Topper)
• [RISCV] Add support for getHostCPUFeatures using hwprobe (#94352) (578cf724de, Yingwei Zheng)
• [RISCV] Add coverage of build vectors with rv32 + v + bitmanip (7217201dd9, Philip Reames)
• [RISCV] Add QingKe "XW" compressed opcode extension (#97925) (3c5f929ad0, R)
• [RISCV] Add FMA support to combineOp_VLToVWOp_VL. (#100454) (b582b658d6, Craig Topper)
• [RISCV] Support vXf16 vector_shuffle with Zvfhmin. (#97491) (c67653fbc3, Craig Topper)
• [RISCV] Add groupid/bitmask for RISC-V extension (#94440) (f4d4ce1a31, Piyou Chen)

Notable Changes

• Update syscall lists for Linux 6.10 (eb0776d4e1, Adhemerval Zanella)
• riscv: Update nofpu libm test ulps (b85a23d736, Darius Rad)
• riscv: Update ulps (ff03b5efe6, Khem Raj)

Notable Changes

• RISC-V: Add platform property/capability extensions (25f05199bb, Tsukasa OI)
• RISC-V: hash with segment id and pcrel_hi address while recording pcrel_hi (f9d218de5c, Lifang Xia)
• RISC-V: PR32001, Untranslated "internal:" prefix for error message. (91a84aaf9a, Nelson Chu)
• RISC-V: avoid use of match_opcode() in riscv_insn_types[] (8c1d0aea1d, Jan Beulich)
• RISC-V: Fix BFD_RELOC_RISCV_PCREL_LO12_S patch issue (c83ea305e2, Sun Sunny)

Notable Changes

• Revert "riscv: dts: jh7110: Enable PLL node in SPL" (dd3cd9eecc, Leo Yu-Chi Liang)
• riscv: add RISC-V fields to bdinfo command (66b5ee9c55, Heinrich Schuchardt)
• board: sifive: unmatched: remove extra space in fdtfile value (763a5d03c4, Andreas Schwab)
• doc: Move bootstd into its own directory (c684db989e, Simon Glass)
• riscv: semihosting: correct alignment (36756308a2, Heinrich Schuchardt)

Notable Changes

• Add new maintainers (462a48e1e7, Ana Hobden)
• Add target page for riscv64gc-unknown-linux-gnu (32efd23955, Ana Hobden)
• Add NuttX based targets for RISC-V and ARM (a84ddc80ac, Huang Qi)
• Fill out target-spec metadata for all targets (3b14526cea, Harry Moulton)
• Reformat `use` declarations. (84ac80f192, Nicholas Nethercote)

Notable Changes

• doc: document 'target create' flags '-dbgbase' and '-coreid' (c9f22c79df, Antonio Borneo)
• doc: Remove outdated '-pipe' option (31e0fc4a7a, Marc Schink)
• server/tcl: Restructure commands (73b15194ea, Marc Schink)
• server/gdb: Restructure commands (44cfdef0a4, Marc Schink)
• jtag/hla: Restructure commands (4d99e77419, Marc Schink)
• doc: fix makeinfo warning (4c6646f10a, Antonio Borneo)

Notable Changes

• Add autodetection for riscv64 (3b715e6162, Mark Ryan)
• fix NAN handling and make it depend on dummy2 parameter (2020569705, Martin Kroeker)
• Fix axpby_rvv kernels for cases where inc_y = 0 (67bf4b6998, Mark Ryan)
• make NAN handling depend on dummy2 parameter (3870995f01, Martin Kroeker)
• make NAN handling depend on dummy2 parameter (7284c533b5, Martin Kroeker)
• fix inverted conditional for NAN handling (a875304eb0, Martin Kroeker)

Notable Changes

• dt-bindings: riscv: Add Zawrs ISA extension description (6d58528116, Andrew Jones)