RISC-V Software News - August 2024

RISC-V International

The spec repos saw 31 commits this month, led by ISA Manual with 20 commits.

Spec Repository Activity

Repository	Commits	Contributors
ISA Manual	20	9
Debug Spec	7	3
SBI Spec	3	1
ELF psABI	1	1

Linux Kernel (RISC-V)

41

Commits

24

Contributors

881

Lines Added

345

Lines Removed

Linux Kernel (RISC-V) saw healthy activity with 41 commits from 24 contributors. Top contributor: Sunil V L with 6 commits. New feature work included 16 commits: "irqchip/riscv-aplic: Add ACPI support"; "irqchip/riscv-imsic: Add ACPI support". Device tree and platform support saw 13 commits. Bug fixes accounted for 8 commits (19%). AIA and interrupt controller work accounted for 7 patches.

16 New features & support 13 Device tree / platform support 8 Bug fixes 7 Interrupt controllers (AIA/APLIC/PLIC) 4 KVM / Virtualisation 3 Performance optimisations 2 ISA extensions 1 Security & memory safety fixes

Notable Changes

riscv: Enable generic CPU vulnerabilites support (0e3f3649d4, Jinjie Ruan)
irqchip/riscv-intc: Add ACPI support for AIA (f8619b66bd, Sunil V L)
irqchip/riscv-aplic: Add ACPI support (5122e380c2, Sunil V L)
irqchip/riscv-imsic: Add ACPI support (fbe826b1c1, Sunil V L)
riscv: Fix out-of-bounds when accessing Andes per hart vendor extension array (e01d48c699, Alexandre Ghiti)
riscv/kexec_file: Fix relocation type R_RISCV_ADD16 and R_RISCV_SUB16 unknown (c6ebf2c528, Ying Sun)
riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error() (0c710050c4, Zhe Qiao)
riscv: Re-introduce global icache flush in patch_text_XXX() (ee9a68394b, Alexandre Ghiti)
RISC-V: hwprobe: Add SCALAR to misaligned perf defines (1f5288874d, Evan Green)
riscv: mm: Do not restrict mmap address based on hint (2116988d53, Charlie Jenkins)
syscalls: fix syscall macros for newfstat/newfstatat (343416f0c1, Arnd Bergmann)
RISC-V: Enable the IPI before workqueue_online_cpu() (3908ba2e0b, Nick Hu)
ACPI: RISC-V: Implement PCI related functionality (01415e78cf, Sunil V L)
riscv: defconfig: sophgo: enable clks for sg2042 (3ccedd259c, Chen Wang)
RISC-V: lib: Add pi aliases for string functions (d57e19fcbf, Jesse Taube)

Top Contributors

Author	Commits
Sunil V L	6
Drew Fustini	6
Jesse Taube	4
Anup Patel	2
Atish Patra	2
Alexandre Ghiti	2
Evan Green	2
Charlie Jenkins	1
Dan Carpenter	1
Chen Wang	1

Mailing List Activity

Re: [PATCH v4 24/26] arch_numa: switch over to numa_memblks — Bruno Faccini
RE: [PATCH 07/16] powerpc: mm: Support MAP_BELOW_HINT — David Laight
Re: [PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B — Inochi Amaoto
Re: [PATCH v5 0/3] Add SARADC support on Sophgo CV18XX series — Jonathan Cameron
Re: [PATCH v5 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo CV1800B SARADC — Jonathan Cameron
Re: [PATCH bpf-next v3 2/4] libbpf: Access first syscall argument with CO-RE direct read on arm64 — Xu Kuohai
Re: [PATCH bpf-next v3 2/4] libbpf: Access first syscall argument with CO-RE direct read on arm64 — Xu Kuohai
[PATCH v2] drivers/perf: riscv: Align errno for unsupported perf event — Pu Lehui
Re: [PATCH bpf-next 1/2] libbpf: Fix accessing first syscall argument on RV64 — Pu Lehui
[PATCH] perf syscalltbl: Add syscalltbl__id_at_idx() with no syscall table support — Charlie Jenkins

OpenSBI

36

Commits

12

Contributors

757

Lines Added

372

Lines Removed

OpenSBI kept moving with 36 commits from 12 contributors. Leading the charge was Samuel Holland with 16 commits. Board and device tree support got 16 commits. Bug fixes accounted for 7 commits (19%). New feature work included 7 commits: "lib: utils/fdt: Add fdt_get_address_rw() helper"; "platform: generic: andes: add a new Andes SBI call to free a PMA entry".

16 Device tree / platform support 7 Bug fixes 7 New features & support 2 Cleanup & refactoring 1 Security & memory safety fixes 1 ISA extensions 1 Interrupt controllers (AIA/APLIC/PLIC)

Notable Changes

platform: generic: andes: add a new Andes SBI call to free a PMA entry (and 3 more) (3d1f53b173, Ben Zong-You Xie)
lib: utils: fdt_domain: Use consistent device-tree address when next-arg1 is missing (56183ca609, Yu Chien Peter Lin)
lib: utils/fdt: Add fdt_get_address_rw() helper (and 2 more) (8cb7f89d7c, Samuel Holland)
lib: sbi: Implement aligned memory allocators (and 2 more) (b9c091ed89, Gregor Haas)
lib: sbi: check result of pmp_get() in is_pmp_entry_mapped() (and 2 more) (6a090ee9dc, Carlos López)
platform: generic: Fix fw_platform_coldboot_harts_init() function (c4940a9517, Anup Patel)
lib: utils: fdt_domain: Make opensbi-domain optional in CPU node (b0ad9e0bdd, Gregor Haas)
platform: generic: Constify FDT pointers in fw_platform_init() (3f964652d9, Samuel Holland)
lib: utils/irqchip: Constify FDT pointers in parsing functions (7df1c8126f, Samuel Holland)
lib: utils/serial: Constify FDT pointers in parsing functions (bd76eb4950, Samuel Holland)
lib: utils/regmap: Constify FDT pointers in parsing functions (1bbda9b26f, Samuel Holland)
lib: utils/reset: Constify FDT pointers in parsing functions (57a0479302, Samuel Holland)
lib: utils/timer: Constify FDT pointers in parsing functions (b15cc7715a, Samuel Holland)
lib: utils/gpio: Constify FDT pointers in parsing functions (c585354380, Samuel Holland)
lib: utils/ipi: Constify FDT pointers in parsing functions (d561418f22, Samuel Holland)

Top Contributors

Author	Commits
Samuel Holland	16
Gregor Haas	4
Ben Zong-You Xie	4
Carlos López	3
Yu Chien Peter Lin	2
Anup Patel	1
Zhang RunMin	1
Daniel Henrique Barboza	1
Clément Léger	1
Leo Yu-Chi Liang	1

Notable Discussions

[RFC PATCH] include: Adjust Sscofpmf mhpmevent mask for upper 8 bits 1 replies — Atish Kumar Patra
Makefile: Remove -g from default CFLAGS 1 replies — Bin Meng
util: atcsmu.c: fix typo "%s/hard/hart/" (2-patch series) 4 replies — Leo Yu-Chi Liang
[PATCH] lib: sbi: dbtr: Delete redundant `ulong` 3 replies — Xiang W
lib: Increase ROOT_REGION_MAX to accomodate more memregions 3 replies — Anup Patel
lib: sbi: Implement aligned memory allocators 3 replies — Anup Patel

Mailing List Activity

[PATCHv2] lib: Delete redundant `ulong` 2 — Zhang Runmin
lib: sbi: Implement SBI MPXY extension 2 — Yu-Chien Peter Lin
[PATCH] lib: sbi: Add additional range checks for RV32 1 — Anup Patel
lib/utils: Add RPMI messaging protocol and shared memory transport support 1 — Bo Gan
lib: sbi: Support multiple heaps 1 — Gregor Haas
lib: utils: fdt_domain: Make opensbi-domain optional in CPU specification 1 — Gregor Haas
include: adding support for Zicfilp / Zicfiss encodings 1 — Deepak Gupta
lib: sbi: Zicfilp/Zicfiss detection and elp cfi state reflect back in status 1 — Samuel Holland

QEMU (RISC-V)

5

Commits

3

Contributors

30

Lines Added

13

Lines Removed

Not the busiest month for QEMU (RISC-V): 5 commits from 3 contributors. Most of the work came from LIU Zhiwei (3 of 5 commits, 60%).

3 New features & support 1 Security & memory safety fixes 1 Device tree / platform support

Notable Changes

Revert "hw/riscv/virt.c: imsics DT: add '#msi-cells'" (6df664f87c, Andrew Jones)
target/riscv: Add asserts for out-of-bound access (73b0195416, Atish Patra)
target/riscv: Relax fld alignment requirement (and 2 more) (5e54b439f5, LIU Zhiwei)

Top Contributors

Author	Commits
LIU Zhiwei	3
Andrew Jones	1
Atish Patra	1

Mailing List Activity

Re: [PATCH v2 01/14] tcg/op-gvec: Fix iteration step in 32-bit operation — Richard Henderson
Re: [PATCH] target/riscv: Stop timer with infinite timecmp — Vladimir Isaev
riscv support for control flow integrity extensions (12-patch series) — Deepak Gupta

LLVM (RISC-V)

160

Commits

35

Contributors

39907

Lines Added

40257

Lines Removed

Plenty of action in LLVM (RISC-V) this month: 160 commits from 35 contributors. A net deletion month (+39,907/-40,257) — always satisfying. Top contributor: Craig Topper with 72 commits. The compiler backend saw heavy activity with 49 commits touching code generation. New feature work included 48 commits: "[RISCV] Add constant folding combine for FMV_X_ANYEXTW/H. (#106653)"; "[RISCV][TTI] Add legality check of vector of address for gather/scatter. (#106481)". Extension support saw 19 commits covering Smctr, Ssctr, Zdinx, Zfhmin, Zfinx, Zhinx.

49 Compiler backend / code generation 48 New features & support 44 Cleanup & refactoring 19 ISA extensions 14 Vector extension (RVV) 10 Bug fixes 4 Performance optimisations

Notable Changes

[RISCV] Implement RISCVTTIImpl::shouldConsiderAddressTypePromotion for RISCV (#102560) (abaa53199e, LiqinWeng)
[RISCV][TTI] Add legality check of vector of address for gather/scatter. (#106481) (e29c5f387f, Elvis Wang)
[RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (#105148) (0ca77f6656, Craig Topper)
[RISCV] Add vector and vector crypto to SiFiveP400 scheduler model (#102155) (7efa068f7a, Michael Maitland)
[GlobalISel] Add bail outs for scalable vectors to some combines. (#106496) (4ca817d051, Craig Topper)
[RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (#103709) (a80a90e34b, Pengcheng Wang)
[RISCV] Add coverage for VP div[u]/rem[u] with non-power-of-2 vectors (aaba552f51, Philip Reames)
[LTO] enable `ObjCARCContractPass` only on optimized build (#101114) (74e4694b8c, Peter Rong)
Recommit "[RISCV] Add isel optimization for (and (sra y, c2), c1) to recover regression from #101751. (#104114)" (0381e01424, Craig Topper)
[RISCV] Add coverage for fp reductions of <2^N-1 x FP> vectors (c9ba6d35c1, Philip Reames)
Revert "[RISCV] Add isel optimization for (and (sra y, c2), c1) to recover regression from #101751. (#104114)" (858afe90aa, Hans Wennborg)
[RISCV] Add coverage for int reductions of <3 x i8> vectors (3145cff24b, Philip Reames)
[RISCV] Support new groupid/bitmask for cpu_model (#101632) (82f52d9c42, Piyou Chen)
RISC-V: Add fminimumnum and fmaximumnum support (#104411) (2b84fe6f16, YunQiang Su)
Revert b1234ddbe2652aa7948242a57107ca7ab12fd2f8. "[DAG] Add legalization handling for ABDS/ABDU (#92576)" (e4e96b3e26, Simon Pilgrim)

Top Contributors

Author	Commits
Craig Topper	72
Luke Lau	16
Philip Reames	15
Anton Sidorenko	5
Fangrui Song	5
Simon Pilgrim	5
Brandon Wu	4
Piyou Chen	3
Pengcheng Wang	3
Yeting Kuo	3

glibc (RISC-V)

2

Commits

2

Contributors

99

Lines Added

32

Lines Removed

Minimal activity in glibc (RISC-V): 2 commits from 2 contributors.

1 Bug fixes

Notable Changes

nptl: Fix Race conditions in pthread cancellation [BZ#12683] (89b53077d2, Adhemerval Zanella)
RISC-V: Regenerate ULPs (a0ecbb4596, Julian Zhu)

Top Contributors

Author	Commits
Adhemerval Zanella	1
Julian Zhu	1

Binutils (RISC-V)

7

Commits

6

Contributors

433

Lines Added

58

Lines Removed

Binutils (RISC-V) saw lighter activity with 7 commits from 6 contributors. Extension support saw 5 commits covering Zbkb. On the mailing list, "[PATCH] RISC-V: Minimal support for Zimop extension." drew 10 replies.

5 ISA extensions 4 New features & support

Notable Changes

RISC-V: Add support for XCvBitmanip extension in CV32E40P (2f1739a348, Mary Bennett)
RISC-V: Add support for Zcmop extension (8a3ffa7194, Xiao Zeng)
RISC-V: Add support for Zimop extension (3ba06284d2, Xiao Zeng)
RISC-V: PR32036, Support Zcmp cm.mva01s and cm.mvsa01 instructions. (ca2590d780, Jiawei)
RISC-V: map zext.h to pack/packw if Zbkb is enabled (87e720ad35, Hau Hsu)
RISC-V: PR32014, .option directives shuoldn't affect elf attribute. (04c9cf0a8c, Nelson Chu)
RISC-V: process rs_align_code also when relaxing (b994624fa5, Jan Beulich)

Top Contributors

Author	Commits
Xiao Zeng	2
Jiawei	1
Jan Beulich	1
Nelson Chu	1
Hau Hsu	1
Mary Bennett	1

Notable Discussions

[PATCH] RISC-V: Minimal support for Zimop extension. 10 replies — Jiawei
[PATCH] RISC-V: map zext.h to pack/packw if Zbkb is enabled 4 replies — Nelson Chu
RISC-V: Add support for XCVsimd extension in CV32E40P 4 replies — Mary Bennett

GDB (RISC-V)

1

Commits

1

Contributors

1

Lines Added

1

Lines Removed

Just a single commit landed in GDB (RISC-V) this month.

Notable Changes

gdb: remove uses of VLA (d724d71ad2, Simon Marchi)

Top Contributors

Author	Commits
Simon Marchi	1

Rust (RISC-V)

3

Commits

2

Contributors

50

Lines Added

2

Lines Removed

Rust (RISC-V) was quiet this month with 3 commits from 2 contributors. Most of the work came from Amanieu d'Antras (2 of 3 commits, 66%).

1 New features & support

Notable Changes

Add platform support document for riscv64gc-unknown-linux-musl (9963a6c400, Amanieu d'Antras)
Make riscv64gc-unknown-linux-musl dynamically linked by default (a937a3b5a1, Amanieu d'Antras)
riscv64imac: allow shadow call stack sanitizer (9c29b33c7e, Ding Xiang Fei)

Top Contributors

Author	Commits
Amanieu d'Antras	2
Ding Xiang Fei	1

OpenOCD (RISC-V)

7

Commits

4

Contributors

35

Lines Added

17

Lines Removed

Not the busiest month for OpenOCD (RISC-V): 7 commits from 4 contributors. Top contributor: Marc Schink with 4 commits.

1 New features & support

Notable Changes

doc: Add 'jlink targetpower' command (5b3d503e2e, Marc Schink)
doc: document that breakpoints are disabled on step/resume (ff22f78d46, Parshintsev Anatoly)
jtag: Use 'unsigned int' for 'scan_field.num_bits' (7d56407ba7, Marc Schink)
jtag: Use 'unsigned int' for 'abs_chain_position' (4fac13827f, Marc Schink)
transport: Remove echo in transport selection (b9224c0c0f, Marc Schink)
rtt: default the ID to "SEGGER RTT" (e7a060090e, Karl Palsson)
doc: document command 'ms' (a414ffaf65, Antonio Borneo)

Top Contributors

Author	Commits
Marc Schink	4
Karl Palsson	1
Parshintsev Anatoly	1
Antonio Borneo	1

The Big Picture

RISC-V International

Spec Repository Activity

Linux Kernel (RISC-V)

Notable Changes

Top Contributors

Mailing List Activity

OpenSBI

Notable Changes

Top Contributors

Notable Discussions

Mailing List Activity

QEMU (RISC-V)

Notable Changes

Top Contributors

Mailing List Activity

LLVM (RISC-V)

Notable Changes

Top Contributors

glibc (RISC-V)

Notable Changes

Top Contributors

Binutils (RISC-V)

Notable Changes

Top Contributors

Notable Discussions

GDB (RISC-V)

Notable Changes

Top Contributors

Rust (RISC-V)

Notable Changes

Top Contributors

OpenOCD (RISC-V)

Notable Changes

Top Contributors