RISC-V Software News

RISC-V International

The spec repos saw 38 commits this month, led by ISA Manual with 22 commits.

Spec Repository Activity

Repository	Commits	Contributors
ISA Manual	22	12
ELF psABI	11	1
SBI Spec	5	4

Linux Kernel (RISC-V)

58

Commits

27

Contributors

2047

Lines Added

1182

Lines Removed

A productive month for Linux Kernel (RISC-V) with 58 commits from 27 contributors. Leading the charge was Clément Léger with 12 commits. New feature work included 20 commits: "riscv: fix runtime constant support for nommu kernels"; "riscv: dts: spacemit: enable eMMC for K1 SoC". Work on Svinval, Zicbop accounted for 10 commits. Bug fixes accounted for 9 commits (15%). Virtualisation work accounted for 2 patches, continuing to mature RISC-V KVM support.

20 New features & support 10 ISA extensions 9 Bug fixes 2 KVM / Virtualisation 2 Vector extension (RVV) 2 Compiler backend / code generation 2 Performance optimisations 1 Interrupt controllers (AIA/APLIC/PLIC) 1 Device tree / platform support

Notable Changes

riscv: mm: Add support for Svinval extension (a569726988, Mayuresh Chitale)
riscv: vector: Support calling schedule() for preemptible Vector (d1049fc0de, Andy Chiu)
riscv: sbi: add SBI FWFT extension calls (and 4 more) (c4a50db1e1, Clément Léger)
riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop (a5f947c731, Guo Ren)
riscv: misaligned: add a function to check misalign trap delegability (and 4 more) (7977448bf3, Clément Léger)
riscv: Fix sparse warning in vendor_extensions/sifive.c (and 4 more) (b0843f8361, Alexandre Ghiti)
riscv: ftrace: support direct call using call_ops (and 5 more) (b21cdb9523, Andy Chiu)
Revert "RISC-V: vDSO: Wire up getrandom() vDSO implementation" (2f956db8b3, Palmer Dabbelt)
riscv: vector: Fix context save/restore with xtheadvector (4262bd0d9c, Han Gao)
RISC-V: vDSO: Wire up getrandom() vDSO implementation (ee0d03053e, Xi Ruoyao)
riscv: fix runtime constant support for nommu kernels (8d90d9872e, Charles Mirabile)
riscv: kexec_file: Support loading Image binary file (809a11eea8, Song Shuai)
riscv: add a data fence for CMODX in the kernel mode (ca358692de, Andy Chiu)
riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS (c217157bcd, Puranjay Mohan)
riscv: module: Optimize PLT/GOT entry counting (be17c0df67, Samuel Holland)

Top Contributors

Author	Commits
Clément Léger	12
Andy Chiu	9
Alexandre Ghiti	6
Vladimir Kondratiev	2
Nam Cao	2
Anup Patel	2
Palmer Dabbelt	2
Xi Ruoyao	2
Guo Ren	2
Song Shuai	2

Mailing List Activity

Re: ld.lld: error: Function Import: link error: linking module flags 'Code Model': IDs have conflicting values: 'i32 3' from vmlinux.a(init.o at 899876), and 'i32 1' from vmlinux.a(security.o at 937376) — Palmer Dabbelt
Re: [PATCH net-next 2/2] net: mdio-mux: Add MDIO mux driver for Sophgo CV1800 SoCs — Alexander Sverdlin
Re: [PATCH v7 3/5] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node — Drew Fustini
Re: [PATCH v4 5/9] clk: thead: Mark essential bus clocks as CLK_IGNORE_UNUSED — Drew Fustini
Re: [PATCH v5 8/9] riscv: dts: thead: Add PVT node — Drew Fustini
Re: [PATCH 0/3] PCI: host-generic: Fix driver_data overwriting bugs — Bjorn Helgaas
Re: [PATCH 2/2] bitops: rotate: Add riscv implementation using Zbb extension — David Laight
Re: [PATCH 0/3] PCI: host-generic: Fix driver_data overwriting bugs — Marc Zyngier
Re: [PATCH 0/3] PCI: host-generic: Fix driver_data overwriting bugs — Bjorn Helgaas
riscv: vdso: Exclude .rodata from the PT_DYNAMIC segment — Sasha Levin

OpenSBI

17

Commits

11

Contributors

880

Lines Added

139

Lines Removed

A steady month for OpenSBI with 17 commits from 11 contributors. The interrupt subsystem got 4 patches of attention this month. Performance work included 1 commit.

5 New features & support 4 Interrupt controllers (AIA/APLIC/PLIC) 3 Bug fixes 1 Performance optimisations

Notable Changes

lib: utils: Add Implementation ID and Version as RPMI MPXY attributes (a5fdef45db, Rahul Pathak)
lib: sbi: Optimize saddr mapping in sbi_dbtr.c (03f44e6b82, Xiang W)
lib: sbi_platform: Add platform specific pmp_set() and pmp_disable() (13abda5169, Chao-ying Fu)
lib: sbi: pmu: Remove MIP clearing from pmu_sse_enable() (f30a54f3b3, Clément Léger)
lib: sbi: pmu: Add SSE register/unregister() callbacks (b31a0a2427, Clément Léger)
Makefile: Add flag for reprodubility compiler flags (6d23a9c570, Khem Raj)
platform: generic: mips: add P8700 (66ab965e54, Chao-ying Fu)
lib: utils/irqchip: always parse msi information for each aplic device (6f8bcae4cb, Inochi Amaoto)
lib: sbi: Revert entry_count before doing hsm stop in hsm wait loop (7dd09bfeca, Anup Patel)
lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid (9f64f06193, Anup Patel)
lib: utils: hsm: Do not fail on EALREADY in rpmi-hsm fixup. (3f8159aa06, Ziang Wang)
lib: sbi: fwft: Use only the provided PMLEN value (771c656181, Samuel Holland)
lib: rpmi: Make RPMI drivers as non-experimental (c2671bb69f, Rahul Pathak)
lib: sbi: dbtr: Fix update_triggers to match SBI (324021423d, Jesse Taube)
lib: sbi: dbtr: Fix shared memory layout (033e0e2353, Jesse Taube)

Top Contributors

Author	Commits
Anup Patel	3
Rahul Pathak	2
Chao-ying Fu	2
Jesse Taube	2
Clément Léger	2
Xiang W	1
Inochi Amaoto	1
Samuel Holland	1
Khem Raj	1
Ziang Wang	1

Notable Discussions

Some improvements on boot sequence 7 replies — Xiang W
lib: sbi: Remove redundant call to sbi_hart_expected_trap_addr() 2 replies — Alvin Chang
[PATCH] lib: sbi_platform: Add platform specific pmp_set() and pmp_disable() 4 replies — Anup Patel
[EXTERNAL]Re: [PATCH] lib: sbi_platform: Add platform specific pmp_set() and pmp_disable() 3 replies — Chao-ying Fu

Mailing List Activity

[PATCH] lib: sbi: dbtr: Fix shared memory layout 1 — Himanshu Chauhan
lib: rpmi: Make RPMI drivers as non-experimental 1 — Rahul Pathak
firmware: Initial compiler built-in stack protector support 1 — Xiang W
[PATCH] lib: utils: Fix fdt_parse_aclint_node() for non-contiguous hartid — Anup Patel
[PATCH] lib: sbi: dbtr: Fix update_triggers to match SBI — Anup Patel
[PATCH] platform: generic: Add support for UltraRISC DP1000 SoC platform — Xiang W
[PATCH] lib: sbi: Optimize saddr mapping in sbi_dbtr.c — Xiang W
lib: sbi_list: Add a helper for reverse list iteration — Samuel Holland
lib: sbi: Implement synchronisation and wait between multiple HARTs — Xiang W

QEMU (RISC-V)

1

Commits

1

Contributors

2

Lines Added

16

Lines Removed

Just a single commit landed in QEMU (RISC-V) this month.

Notable Changes

hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class (860bb8b925, Zhenzhong Duan)

Top Contributors

Author	Commits
Zhenzhong Duan	1

Mailing List Activity

Re: [PATCH v3 RESEND] migration: Fix migration failure when aia is configured as aplic-imsic — Alistair Francis
Re: [PATCH v3] hw/riscv/virt: Add acpi ged and powerdown support — Daniel Henrique Barboza
Re: [PATCH] hmp-cmds-target, target/riscv: add 'info register' — Daniel Henrique Barboza
Re: [PATCH] hmp-cmds-target, target/riscv: add 'info register' — Philippe Mathieu-Daudé
[PATCH] hmp-cmds-target, target/riscv: add 'info register' — Daniel Henrique Barboza
Re: [PATCH v4 11/11] riscv/boston-aia: Add an e1000e NIC in slot 0 func 1 — Daniel Henrique Barboza
Re: [PATCH v4 09/11] hw/riscv: Add support for MIPS Boston-aia board model — Daniel Henrique Barboza
Re: [PATCH v4 08/11] hw/misc: Add support for MIPS Boston-aia board model — Daniel Henrique Barboza
Re: [PATCH v4 07/11] target/riscv: Add Xmipslsp instructions — Daniel Henrique Barboza
Re: [PATCH v4 06/11] target/riscv: Add mips.pref instruction — Daniel Henrique Barboza

GCC (RISC-V)

55

Commits

13

Contributors

1240

Lines Added

503

Lines Removed

GCC (RISC-V) had a solid month with 55 commits from 13 contributors. Pan Li was the most active contributor with 12 commits. New feature work included 19 commits: "RISC-V: Add pipeline-checker script"; "RISC-V: Add comment and reorder the the include files in riscv.md [NFC]". The vector extension (RVV) saw 14 commits of continued development. Compiler backend and code generation improvements accounted for 14 commits. Work on Smcntrpmf, Sstvala, Sstvecd, Svadu, Svbare, Zicsr accounted for 13 commits.

19 New features & support 14 Vector extension (RVV) 14 Compiler backend / code generation 13 ISA extensions 7 Bug fixes 6 Cleanup & refactoring

Notable Changes

RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828] (and 4 more) (181cb2943d, Paul-Antoine Arras)
RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost (and 11 more) (a2d018b642, Pan Li)
RISC-V: Support -mcpu for XiangShan Kunminghu cpu. (and 9 more) (f0cd40f71b, Jiawei)
RISC-V: Add generic tune as default. (and 3 more) (20f5930185, Dongyan Chen)
RISC-V: Add pipeline-checker script (and 6 more) (9dda053e41, Kito Cheng)
[RISC-V] Enable more if-conversion on RISC-V (af3de9e209, Jeff Law)
[to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves (59a3da733a, Jeff Law)
RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203] (and 3 more) (fd04219209, Vineet Gupta)
[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V (bf7162b321, Jeff Law)
[RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V (49199bb296, Jeff Law)
[RISC-V] Fix ICE due to splitter emitting constant loads directly (b93d8873cd, Jeff Law)
[RISC-V] Handle 32bit operands in condition for conditional moves (2523c15430, Shreya Munnangi)
RISC-V: Refactor the function bitmap_union_of_preds_with_entry (2609a7a597, Jin Ma)
[RISC-V][PR target/119830] Fix RISC-V codegen on 32bit hosts (07c02ff39e, Andrew Pinski)
[RISC-V] Improve sequences to generate -1, 1 in some cases. (1d90f8c793, Jeff Law)

Top Contributors

Author	Commits
Pan Li	12
Jiawei	10
Kito Cheng	7
Jeff Law	7
Paul-Antoine Arras	5
Dongyan Chen	4
Vineet Gupta	4
Jin Ma	1
Andrew Pinski	1
Umesh Kalappa	1

Notable Discussions

[PATCH] RISC-V: Support CPUs in -march. 9 replies — Robin Dapp

LLVM (RISC-V)

165

Commits

34

Contributors

33996

Lines Added

11615

Lines Removed

LLVM (RISC-V) saw heavy activity with 165 commits from 34 contributors. That's +33,996/-11,615 lines of churn. Top contributor: Craig Topper with 38 commits. New feature work included 51 commits: "MCFragment: Add addFixup to replace getFixups().push_back()"; "MCParsedAsmOperand::print: Add MCAsmInfo parameter". Code generation improvements dominated with 34 commits. ISA extension work spanned 33 commits, touching QC_CLO, QC_CTO, QC_EXT, QC_EXTU, QC_E_CALL_PLT, QC_E_JUMP_PLT.

51 New features & support 38 Cleanup & refactoring 34 Compiler backend / code generation 33 ISA extensions 12 Performance optimisations 11 Bug fixes 9 Vector extension (RVV) 1 Interrupt controllers (AIA/APLIC/PLIC)

Notable Changes

[RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension (#144320) (8ddada41df, Jim Lin)
[RISCV] Add new tests for RISCV zicond extension (#143580) (9f542f1470, Ryan Buchner)
[RISCV] Add support for handling one tied operand in the source instruction for compress patterns (#143660) (408e55098d, quic_hchandel)
[RISCV] Add GetVTypeMinimalPredicates for the operation supported by zvfhmin. NFC. (#143847) (d64ee2cd4f, Jim Lin)
[RISCV] Explicitly check for supported opcodes in optimizeCondBranch. NFC (#145622) (cca44e030d, Craig Topper)
[RISCV] Add Tied operands in Xqcicm instructions and changes to handle a single tied operand in source DAG and instruction (#145538) (deb3464192, quic_hchandel)
[RISCV] Support scalable vector vp.reverse/splice with Zvfhmin/Zvfbfmin. (#145588) (9702d37062, Craig Topper)
[RISCV] Support fixed vector vp.reverse/splice with Zvfhmin/Zvfbfmin. (#145596) (6fd182a3bb, Craig Topper)
[RISCV] Add symbol parsing support for XAndesPerf branch instructions (#137748) (a05393a879, Jim Lin)
[RISCV] Add ISel patterns for Qualcomm uC Xqcicm extension (#145643) (950d281eb2, quic_hchandel)
[SelectionDAG][RISCV] Add support for splitting vp.splice (#145184) (576085c948, Craig Topper)
[CodeGen/RISCV] Add fixed-vector [l]lround tests (#145926) (947e072744, Ramkumar Ramachandra)
[SelectionDAG][RISCV] Fold (add (vscale * C0), (vscale * C1)) to (vscale * (C0 + C1)) in getNode. (#144565) (ad9e591fd5, Craig Topper)
[RISCV] Use addi rather than addiw for immediates materialised by lui+addi(w) pairs when possible (#141663) (3d2650bdeb, Alex Bradbury)
[RISCV] Add support for -mtune=andes-45-series (#142900) (2a8c7d3c69, Jim Lin)

Top Contributors

Author	Commits
Craig Topper	38
Jim Lin	25
Sam Elliott	13
Philip Reames	11
Fangrui Song	10
Sudharsan Veeravalli	9
Piotr Fusik	7
Min-Yih Hsu	6
Jesse Huang	5
quic_hchandel	4

glibc (RISC-V)

4

Commits

3

Contributors

53

Lines Added

14

Lines Removed

glibc (RISC-V) was quiet this month with 4 commits from 3 contributors. Performance work included 1 commit.

3 New features & support 1 Bug fixes 1 Performance optimisations

Notable Changes

termios: add new baud_t interface, defined to be explicitly numeric (5f138519eb, H. Peter Anvin (Intel))
riscv: linux: Add support for getrandom vDSO (fc6f074e04, Xi Ruoyao)
linux: implement arbitrary and split speeds in termios (5cf101a85a, H. Peter Anvin (Intel))
riscv: Correct __riscv_hwprobe function prototype [BZ #32932] (8af8beb1c4, Mark Harris)

Top Contributors

Author	Commits
H. Peter Anvin (Intel)	2
Xi Ruoyao	1
Mark Harris	1

Notable Discussions

[PATCH RFC v2] RISCV: insert zimop instruction at the start 9 replies — enh

Binutils (RISC-V)

9

Commits

4

Contributors

493

Lines Added

55

Lines Removed

A quieter month for Binutils (RISC-V), with 9 commits from 4 contributors.

4 New features & support 2 ISA extensions 1 Cleanup & refactoring

Notable Changes

RISC-V: Add support for svvptc extension. (e0098422ba, Dongyan Chen)
RISC-V: Add Profiles RVA/B23S64 support. (and 2 more) (724da17ae5, Jiawei)
RISC-V: Support for unlabeled landing pad PLT generation (and 2 more) (9b4b518ece, Kito Cheng)
str_hash_find casts (7e34612049, Alan Modra)
str_hash_find_int (b387c0127e, Alan Modra)

Top Contributors

Author	Commits
Jiawei	3
Kito Cheng	3
Alan Modra	2
Dongyan Chen	1

Notable Discussions

[PATCH] RISC-V: [gprofng] Allow building gprofng without asm/hwprobe.h 3 replies — Yixuan Chen

GDB (RISC-V)

3

Commits

3

Contributors

14

Lines Added

27

Lines Removed

GDB (RISC-V) was quiet this month with 3 commits from 3 contributors.

1 New features & support

Notable Changes

gdb/record: Support csrrci instruction in risc-v (fc616d4278, Timur)
Change file initialization to use INIT_GDB_FILE macro (5fe70629ce, Tom Tromey)
gdb/solib: C++ify solib_ops (a2e3cce344, Simon Marchi)

Top Contributors

Author	Commits
Simon Marchi	1
Tom Tromey	1
Timur	1

U-Boot (RISC-V)

8

Commits

5

Contributors

38

Lines Added

26

Lines Removed

Not the busiest month for U-Boot (RISC-V): 8 commits from 5 contributors.

2 New features & support 2 Device tree / platform support 1 Cleanup & refactoring

Notable Changes

riscv: cpu: th1520: Support cache enabling/disabling in M mode only (85cfabe895, Yao Zi)
dtc: Add Kconfig option to pad device tree blob (5ba5cbf5a2, Eric Schikschneit)
riscv: dts: th1520: Prepare binman configuration for loading OpenSBI (6033a66f89, Yao Zi)
Revert "booti/bootm: riscv: Verify image arch type" (04fcd9a56b, Mayuresh Chitale)
Revert "riscv: Select appropriate image type" (29a2025d77, Mayuresh Chitale)
riscv: remove volatile from set_gd prototype (ae86cd8c59, Rasmus Villemoes)
riscv: cpu: th1520: Build spl.c for SPL only (0463545678, Yao Zi)
spl: Rename jump_to_image_no_args() (f73450918d, Simon Glass)

Top Contributors

Author	Commits
Yao Zi	3
Mayuresh Chitale	2
Eric Schikschneit	1
Rasmus Villemoes	1
Simon Glass	1

Rust (RISC-V)

1

Commits

1

Contributors

177

Lines Added

0

Lines Removed

Rust (RISC-V) had exactly one commit this month. Bug fixes dominated: 1/1 commits (100%). A month focused on getting things right.

1 Bug fixes

Notable Changes

Fix RISC-V C function ABI when passing/returning structs containing floats (5723c9997c, beetrees)

Top Contributors

Author	Commits
beetrees	1

OpenOCD (RISC-V)

10

Commits

4

Contributors

42

Lines Added

14

Lines Removed

OpenOCD (RISC-V) saw lighter activity with 10 commits from 4 contributors. Most of the work came from Marc Schink (6 of 10 commits, 60%). Bug fixes accounted for 4 commits (40%).

4 Bug fixes 2 New features & support

Notable Changes

jlink: add nickname support (1040bdec79, Vitaly Cheptsov)
doc: Fix 'add_help_text' and 'add_usage_text' usage (and 2 more) (99d642ca5b, Marc Schink)
flash/nor/tcl: Add 'read_memory' command (6a40fe64d6, Marc Schink)
doc: bcm2835gpio: remove broken link and clarify usage (7abc0f9e65, Jonathan Bell)
adapter: Deprecate Amontec JTAG Accelerator driver (88aec4b499, Marc Schink)
adapter: Deprecate Gateworks GW16012 driver (207ecaab33, Marc Schink)
doc: list target unavailable state (6975baa88b, Tomas Vanek)
doc: fix bp usage (e8dca11245, Tomas Vanek)

Top Contributors

Author	Commits
Marc Schink	6
Tomas Vanek	2
Vitaly Cheptsov	1
Jonathan Bell	1

OpenBLAS (RISC-V)

6

Commits

4

Contributors

1089

Lines Added

710

Lines Removed

OpenBLAS (RISC-V) saw lighter activity with 6 commits from 4 contributors. Performance work included 1 commit.

2 ISA extensions 2 Bug fixes 1 New features & support 1 Performance optimisations

Notable Changes

Added shgemm_kernel_8x8 for RISCV64_ZVL128B and shgemm_kernel_16x8 for RISCV64_ZVL256B (670ec6f757, gkdddd)
add dummy2 flag handling for inf/nan agnostic zeroing (f18b7a46bf, Martin Kroeker)
fixed the performance problem in RISCV64_ZVL256 when OPENBLAS_K is small (2ae019161a, guoyuanplct)
fix: resolve the compilation failure without zfh instruction (4e1a381e5b, Srangrang)
fix: resolve non-RISCV host build failed issue (ec14e1648c, Srangrang)
use dummy2 as Inf/NAN handling flag (73af02b89f, Martin Kroeker)

Top Contributors

Author	Commits
Srangrang	2
Martin Kroeker	2
guoyuanplct	1
gkdddd	1

The Big Picture

RISC-V International

Spec Repository Activity

Linux Kernel (RISC-V)

Notable Changes

Top Contributors

Mailing List Activity

OpenSBI

Notable Changes

Top Contributors

Notable Discussions

Mailing List Activity

QEMU (RISC-V)

Notable Changes

Top Contributors

Mailing List Activity

GCC (RISC-V)

Notable Changes

Top Contributors

Notable Discussions

LLVM (RISC-V)

Notable Changes

Top Contributors

glibc (RISC-V)

Notable Changes

Top Contributors

Notable Discussions

Binutils (RISC-V)

Notable Changes

Top Contributors

Notable Discussions

GDB (RISC-V)

Notable Changes

Top Contributors

U-Boot (RISC-V)

Notable Changes

Top Contributors

Rust (RISC-V)

Notable Changes

Top Contributors

OpenOCD (RISC-V)

Notable Changes

Top Contributors

OpenBLAS (RISC-V)

Notable Changes

Top Contributors