RISC-V Software News

May 2026 — Upstream Open Source Activity

The Big Picture

A lighter May with 124 commits across 6 projects. The most active projects were QEMU (RISC-V) (58), OpenSBI (33), OpenOCD (RISC-V) (19). Software support advanced for Smcntrpmf, Smctr, Sscofpmf, Ssctr, Zicbop, Zvknha, Zvknhb. Marc Schink authored 73% of OpenOCD (RISC-V) commits this month.

RISC-V International

RISC-V International is tracking 100 specifications, of which 49 have been ratified. Currently 20 are in the home stretch (freeze/stabilisation/ratification-ready), 11 under active development, and 11 in planning. Specs flagged as "exposed" (at risk of slipping): Confidential VM Extension (CoVE) with I/O. Keep an eye on these. Across RISC-V International, 74 working groups are tracked — 54 actively meeting, 9 running at low activity. New groups being chartered: Performance Events TG, Parameters SIG, Event Trace TG, Logic Analyzer Trace TG, Speculation Barriers TG . The spec repos saw 86 commits this month, led by ISA Manual with 86 commits.

Spec Pipeline Changes (since April 2026)

1 new specification ratified this month.

  • RISC-V Hart Trace Interface (RHTI) — Freeze → Ratification-Ready
  • S-mode Physical Memory Protection (SPMP) — Freeze → Ratification-Ready
  • Implicit Return Extension to the Enhanced Trace for RISC-V 2.0 — Planning → Development
  • Standard Support Packet extension to E-trace — Planning → Development

New specs entering the pipeline:

  • Zabhlrsc (Inception)

Specs removed from pipeline:

  • Instruction/Data Coherence and Consistency Extension (Ziccid) (was: Ratification-Ready)
  • Composable Custom Extensions (was: Planning)

Specification Pipeline (100 total, 49 ratified)

49
Ratified
17
in Freeze
11
Under Development
11
in Planning
5
Cancelled
4
Inception
3
in Ratification-Ready

Ratification-Ready (3)

Freeze (17)

Development (11)

Planning (11)

Inception (4)

Spec Repository Activity

RepositoryCommitsContributors
ISA Manual 86 13

Working Groups (74 total)

54
Active
9
Low Activity
10
Being Chartered

New Groups Being Chartered

  • Performance Events TG — chaired by Beeman Strong (Meta)
  • Parameters SIG
  • Event Trace TG — chaired by Bruce Ableidinger (MIPS)
  • Logic Analyzer Trace TG — chaired by Sajosh Janarthanam (Tenstorrent)
  • Speculation Barriers TG — chaired by Ved Shanbhogue (Meta)
  • RVM Profile TG — chaired by Ozgur Ozkurt (Quintauris)
  • Automotive SIG — chaired by Thomas Roecker (Infineon)
  • Long Instruction TG — chaired by Stefan Wallentowitz (Individual Member)
  • JITed and Dynamic Languages SIG — chaired by Martin Maas (Google)
  • Vector Digital Signal Processing TG — chaired by Dmitry Utyansky (Synopsys)

OpenSBI

33
Commits
13
Contributors
2044
Lines Added
496
Lines Removed

OpenSBI saw moderate activity with 33 commits from 13 contributors. Top contributor: Anup Patel with 12 commits. New feature work included 16 commits: "lib: utils: fdt_domain: add root-regions-inheritance policy"; "lib: sbi: domain FP/Vector context support for context switch". The interrupt subsystem got 7 patches of attention this month. Extension support saw 3 commits covering Smcntrpmf, Sscofpmf.

16 New features & support 7 Interrupt controllers (AIA/APLIC/PLIC) 3 ISA extensions 3 Bug fixes 2 Vector extension (RVV) 1 Cleanup & refactoring 1 Device tree / platform support

Notable Changes

  • lib: sbi: domain FP/Vector context support for context switch (and 2 more) (22d7e99ed2, Dave Patel)
  • lib: sbi_irqchip: Add support for registering MSI handlers (and 5 more) (79e63bc834, Anup Patel)
  • lib: utils/reset: add SpacemiT P1 PMIC support (d9637d00bf, Aurelien Jarno)
  • lib: sbi: hart: Detect and enable Smrnmi before trap-based feature detection (and 3 more) (2d211fe6f9, Evgeny Voevodin)
  • lib: sbi_timer: Introduce sbi_timer_compute_delta() and friends (and 2 more) (1932ee3f0a, Anup Patel)
  • lib: sbi_domain: reject overflowing address range in check_addr_range() (9595829a33, Takumi Hara)
  • include: sbi_scratch: Add tmp1 scratch space for RNMI context saving (5d248a0132, Evgeny Voevodin)
  • lib: utils: fdt_domain: add root-regions-inheritance policy (f36acaeb80, Yu-Chien Peter Lin)
  • sbi: mpxy: define INVALID_ADDR using unsigned long width (e92c8fd083, Himanshu Chauhan)
  • lib: utils/i2c: add minimal SpacemiT I2C driver (b10e18ec85, Aurelien Jarno)
  • platform: generic: Tenstorrent Atlantis support (6767861c48, Nicholas Piggin)
  • include: sbi: Add sbi_scratch_hartindex() macro (d8c7dc9cb0, Anup Patel)
  • firmware: Add RNMI handler infrastructure (00fec20b49, Evgeny Voevodin)
  • lib/sbi_pmu: Don't fallback to fixed counters when sscofpmf && !smcntrpmf (65bb705f7b, Michael Ellerman)
  • lib: fdt_domain: Default boot-hart to coldboot HART for multi-domain boot (8cd279e321, Yu-Chien Peter Lin)

Top Contributors

AuthorCommits
Anup Patel12
Evgeny Voevodin6
Dave Patel3
Yu-Chien Peter Lin2
Aurelien Jarno2
Samuel Holland1
Himanshu Chauhan1
Takumi Hara1
Andrew Jones1
David E. Garcia Porras1

Notable Discussions

Mailing List Activity

QEMU (RISC-V)

58
Commits
22
Contributors
590
Lines Added
480
Lines Removed

QEMU (RISC-V) had a solid month with 58 commits from 22 contributors. Daniel Henrique Barboza was the most active contributor with 15 commits. Bug fixes accounted for 10 commits (17%). Work on Smctr, Ssctr, Zicbop, Zvknha, Zvknhb accounted for 8 commits. New feature work included 8 commits: "hw/riscv: Add macros and globals for simplifying machine definitions"; "linux-user/riscv: add coredump support". Virtualisation work accounted for 3 patches, continuing to mature RISC-V KVM support.

10 Bug fixes 8 ISA extensions 8 New features & support 3 KVM / Virtualisation 2 Device tree / platform support 1 Security & memory safety fixes 1 Vector extension (RVV) 1 Interrupt controllers (AIA/APLIC/PLIC) 1 Cleanup & refactoring

Notable Changes

  • target/riscv/kvm: add KVM support for Zicbop extension (7499bae6d9, Zongmin Zhou)
  • target/riscv/kvm: Add BFloat16 extensions support (e217f49cc2, Zongmin Zhou)
  • linux-user/riscv: add coredump support (4b5e20839b, Matt Turner)
  • target/riscv: rvv: Handle source overlap of vector widening reduction instructions (caf3bef5f0, Anton Blanchard)
  • target/riscv: clear mseccfg on reset for all dependent extensions (and 5 more) (8158a74f0a, Zishun Yi)
  • target/riscv/pmp: Fix integer overflow in TOR and NA4 address computation (612f22c19d, Zishun Yi)
  • target/riscv/cpu.c: remove riscv_cpu_enable_named_feat() (and 2 more) (48dda4700f, Daniel Henrique Barboza)
  • target/riscv: Make get_phys_page_debug handle non-page-aligned addrs (2ae8467854, Peter Maydell)
  • target: Rename get_phys_page_debug to get_phys_addr_debug (85ea0ab9e7, Peter Maydell)
  • target/riscv: Update MISA.X for non-standard extensions (613bb1949f, Frank Chang)
  • target/riscv/csr.c: fix read of pmpaddr(0-63) CSRs (53cc9747ed, Daniel Henrique Barboza)
  • target/riscv: Update MISA.C for Zc* extensions (f0433a8bc4, Frank Chang)
  • hw/riscv: Filter machine types for qemu-system-riscv32/64 binaries (and 2 more) (72b4174d2f, Anton Johansson)
  • target/riscv/tcg: use isa_edata_arr[] to create user props (and 5 more) (e499a42786, Daniel Henrique Barboza)
  • hw/riscv: riscv-iommu: Re-process command queue after clearing CMD_ILL (b7d87fb10d, Jay Chang)

Top Contributors

AuthorCommits
Daniel Henrique Barboza15
Zishun Yi9
Philippe Mathieu-Daudé7
Anton Johansson3
Alistair Francis3
Anton Blanchard2
Zongmin Zhou2
Frank Chang2
Peter Maydell2
Djordje Todorovic1

Notable Discussions

Mailing List Activity

glibc (RISC-V)

5
Commits
3
Contributors
581
Lines Added
0
Lines Removed

glibc (RISC-V) saw lighter activity with 5 commits from 3 contributors. Most of the work came from Yao Zihong (3 of 5 commits, 60%). Vector extension support moved forward with 3 commits.

3 Vector extension (RVV) 3 New features & support

Notable Changes

  • riscv: Add RVV strncmp for both multiarch and non-multiarch builds (and 2 more) (9b8ff36d0c, Yao Zihong)
  • elf: Defer all IRELATIVE relocations until after PLT setup (63b31c05a8, Adhemerval Zanella)
  • riscv: redirect strlen in early startup (b28ffb926f, Andreas Schwab)

Top Contributors

AuthorCommits
Yao Zihong3
Adhemerval Zanella1
Andreas Schwab1

Notable Discussions

OpenOCD (RISC-V)

19
Commits
5
Contributors
75
Lines Added
108
Lines Removed

OpenOCD (RISC-V) saw moderate activity with 19 commits from 5 contributors. The codebase got leaner: +75/-108. Most of the work came from Marc Schink (14 of 19 commits, 73%).

4 New features & support

Notable Changes

  • jtag/drivers: add T-Head CK-Link JTAG adapter driver (97a11c4f53, William Markezana)
  • adapter: Implement USB product name handling (a41341bbf7, Marc Schink)
  • adapter: Implement USB VID/PID parsing (eb5ad857bf, Marc Schink)
  • jtag/drivers: add Xilinx XVC TCP (c319c76330, Jose Borja Castillo)
  • adapter/esp-usb-jtag: Delegate USB VID/PID parsing to adapter core (7d937ed363, Marc Schink)
  • adapter/usb-blaster: Delegate USB VID/PID parsing to adapter core (ea528c7198, Marc Schink)
  • adapter/cmsis-dap: Delegate USB VID/PID parsing to adapter core (c5d02a2143, Marc Schink)
  • adapter/openjtag: Delegate USB VID/PID parsing to adapter core (ead2fa8c2e, Marc Schink)
  • adapter/openjtag: Use adapter core USB product name handling (6fc1cf0856, Marc Schink)
  • adapter/ft232r: Delegate USB VID/PID parsing to adapter core (0813c28f60, Marc Schink)
  • adapter/stlink: Delegate USB VID/PID parsing to adapter core (9ff30417df, Marc Schink)
  • adapter/ch347: Delegate USB VID/PID parsing to adapter core (8dc061827c, Marc Schink)
  • adapter/ftdi: Delegate USB VID/PID parsing to adapter core (0c4271add7, Marc Schink)
  • adapter/ch347: Use adapter core USB product name handling (3a7635f447, Marc Schink)
  • adapter/hla: Delegate USB VID/PID parsing to adapter core (cd8cf385ea, Marc Schink)

Top Contributors

AuthorCommits
Marc Schink14
Antonio Borneo2
Evgeniy Naydanov1
William Markezana1
Jose Borja Castillo1

OpenBLAS (RISC-V)

1
Commits
1
Contributors
3
Lines Added
38
Lines Removed

OpenBLAS (RISC-V) had exactly one commit this month. Almost entirely a bug-fix month at 100% (1 of 1 commits).

1 Bug fixes

Notable Changes

  • Fix contiguous memory check for SGEMM and DGEMM. (f3f718b228, Chip Kerchner)

Top Contributors

AuthorCommits
Chip Kerchner1

Eigen (RISC-V)

8
Commits
4
Contributors
3363
Lines Added
1185
Lines Removed

A quieter month for Eigen (RISC-V), with 8 commits from 4 contributors. RVV work continued with 5 commits touching vector-related code.

5 Vector extension (RVV) 2 Bug fixes 2 New features & support 1 Cleanup & refactoring

Notable Changes

  • Adds support for complex vector API for RISC-V (4b325d6b13, Chip Kerchner)
  • RVV: add missing SPDX-License-Identifier to PacketMathDecl.h (c259c745f6, Rasmus Munk Larsen)
  • Licensing: SPDX identifiers, REUSE.toml, and checkformat:reuse CI job (8a3d61c790, Rasmus Munk Larsen)
  • RVV: simplify packet math declaration boilerplate (0efe8f6b4c, Charles Schlosser)
  • CI: clang-format-17 cleanup of pre-existing drift (2031535041, Rasmus Munk Larsen)
  • Fix VLEN = 128 compilation issues for RISC-V (b0b27dc068, Chip Kerchner)
  • Modernize internal utilities for C++14 (879885e10d, Florian Maurin)
  • Fix VLEN = 1024 issues for RISC-V (0f704a5d2e, Chip Kerchner)

Top Contributors

AuthorCommits
Chip Kerchner3
Rasmus Munk Larsen3
Charles Schlosser1
Florian Maurin1