RISC-V Software News

August 2026 — Upstream Open Source Activity (In Progress)
Work in Progress — This report covers August 2026 which is still ongoing (18 days remaining). Numbers will change as more patches land. Check back after the month ends for the final tally.

The Big Picture

A lighter August with 58 commits across 5 projects. LLVM (RISC-V) led with 50 commits (86%). Also active: OpenSBI (5), glibc (RISC-V) (1), Binutils (RISC-V) (1).

RISC-V International

RISC-V International is tracking 100 specifications, of which 51 have been ratified. Currently 23 are in the home stretch (freeze/stabilisation/ratification-ready), and 14 in planning. Specs flagged as "exposed" (at risk of slipping): Long/Batched Dot-Product Extensions (Zvldot and Zvbdot), Confidential VM Extension (CoVE). Keep an eye on these. Across RISC-V International, 73 working groups are tracked — 56 actively meeting, 12 running at low activity. New groups being chartered: Performance Events TG, Parameters SIG, Event Trace TG, Logic Analyzer Trace TG, Speculation Barriers TG . The spec repos saw 1 commits this month, led by ISA Manual with 1 commits.

Spec Pipeline Changes (since July 2026)

  • RVA23.1 — Freeze → Ratification-Ready
  • RVB23.1 — Freeze → Ratification-Ready

New specs entering the pipeline:

  • Confidential VM Extension (CoVE) (Freeze)
  • Extra Vector Carry-Less/Crypto Extensions (Zvbc32e, Zvkgs) (Freeze)
  • Integrated Matrix Extension (IME) (Freeze)

Specs removed from pipeline:

  • Attached Matrix Extension (AME) (was: Planning)
  • Timing Fences (was: Planning)
  • adsad (was: Inception)

Specification Pipeline (100 total, 51 ratified)

51
Ratified
14
in Planning
11
in Freeze
7
in Ratification-Ready
6
Cancelled
5
Under Stabilization
5
Inception
1
in Publication

Ratification-Ready (7)

Freeze (11)

Stabilization (5)

Planning (14)

Inception (5)

Spec Repository Activity

RepositoryCommitsContributors
ISA Manual 1 1

Working Groups (73 total)

56
Active
12
Low Activity
10
Being Chartered

New Groups Being Chartered

  • Performance Events TG — chaired by Beeman Strong (Meta)
  • Parameters SIG
  • Event Trace TG — chaired by Bruce Ableidinger (MIPS)
  • Logic Analyzer Trace TG — chaired by Sajosh Janarthanam (Tenstorrent)
  • Speculation Barriers TG — chaired by Ved Shanbhogue (Meta)
  • RVM Profile TG — chaired by Ozgur Ozkurt (Quintauris)
  • Automotive SIG — chaired by Thomas Roecker (Infineon)
  • Long Instruction TG — chaired by Stefan Wallentowitz (Individual Member)
  • JITed and Dynamic Languages SIG — chaired by Martin Maas (Google)
  • Vector Digital Signal Processing TG — chaired by Dmitry Utyansky (Synopsys)

OpenSBI

5
Commits
1
Contributors
224
Lines Added
64
Lines Removed

A quieter month for OpenSBI, with 5 commits. Anup Patel was the driving force, authoring 5 of 5 commits (100%).

2 New features & support 1 Bug fixes

Notable Changes

  • lib: sbi: Print list of all hart protection mechanisms at boot time (and 4 more) (337c23dd66, Anup Patel)

Top Contributors

AuthorCommits
Anup Patel5

LLVM (RISC-V)

50
Commits
35
Contributors
11846
Lines Added
1704
Lines Removed

LLVM (RISC-V) saw healthy activity with 50 commits from 35 contributors. +11,846/-1,704 lines changed — a big diff. Sam Elliott was the most active contributor with 7 commits. New feature work included 14 commits: "[RISCV][P-ext] Support Packed Multiply High (#211223)"; "[RISCV][NFC] Add tests for zext(phi/select) (#215363)". Compiler backend and code generation improvements accounted for 10 commits. Bug fixes accounted for 7 commits (14%).

14 New features & support 10 Compiler backend / code generation 9 ISA extensions 7 Bug fixes 4 Vector extension (RVV) 3 Cleanup & refactoring 1 Performance optimisations

Notable Changes

  • [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (#183158) (8d19df3660, tudinhh)
  • [RISCV][MC] Add experimental Smijt, Ssijt, Smehv, and Ssehv support (#213431) (c15a90d299, Zeyi Xu)
  • [RISCV] Reduce spill/reload pairs when Xqcilo extension is enabled (#212807) (8b18aa0b1e, Garvit Gupta)
  • [SDAG] Add basic type legalization for experimental.vector.match (#213344) (09ceea0938, Benjamin Maxwell)
  • [RISCV][MC] Add experimental Smcsps and Sscsps support (#211712) (037a0f40a8, Zeyi Xu)
  • [RISCV][NewPM] Add NewPM Codegen Pipeline Skeleton (#213129) (2f428947c3, Sam Elliott)
  • [RISCV][SMT] Add SpacemiT-x100 vector sched info (#210597) (00312bb11d, LiqinWeng)
  • [DAG] Change `isExtractSubvectorCheap` into `getExtractSubvectorCost` (#213614) (56a654b9a9, Shoreshen)
  • [RISCV] Fix incorrect lowering of VECTOR_INTERLEAVE on fixed vectors (#212642) (ff9b99207b, Min-Yih Hsu)
  • [RISCV] Remove experimental from extension names in a test. NFC (#215621) (b3ccb7160d, Craig Topper)
  • RuntimeLibcalls: Add sincos to the RISCV runtime libcall set (#215115) (82227d1cd0, Matt Arsenault)
  • [RISCV] Add scheduler definitions for XiangShan-KunMingHu (#148581) (fa01521e37, Lin Wang)
  • [SDAG][NVPTX] Cache control metadata support and lowering (#204067) (f180ce951b, Yonah Goldberg)
  • [RISC-V] Use an optional offset for C/Zc* extension instruction (f527e7adfb, Alexander Richardson)
  • [GlobalISel] Add immediates to `LegalizerQuery` (#211101) (ab130aaf53, Demetrius Kanios)

Top Contributors

AuthorCommits
Sam Elliott7
Craig Topper3
Alexander Richardson2
Luke Lau2
Kane Wang2
Sean Clarke2
Brandon Wu2
Zeyi Xu2
Pengcheng Wang2
Hongyu Chen1

glibc (RISC-V)

1
Commits
1
Contributors
1
Lines Added
1
Lines Removed

Just a single commit landed in glibc (RISC-V) this month.

Notable Changes

  • elf: Improve diagnostics for static TLS exhaustion (97f74c6781, Frédéric Bérat)

Top Contributors

AuthorCommits
Frédéric Bérat1

Binutils (RISC-V)

1
Commits
1
Contributors
1
Lines Added
0
Lines Removed

Binutils (RISC-V) had exactly one commit this month.

Notable Changes

  • RISC-V: define elf_backend_dtrel_excludes_plt (4e8ba93fdb, juewang)

Top Contributors

AuthorCommits
juewang1

Eigen (RISC-V)

1
Commits
1
Contributors
5
Lines Added
10
Lines Removed

One lone commit for Eigen (RISC-V) this month. Code housekeeping was a significant theme at 1 commit (100%).

1 Cleanup & refactoring

Notable Changes

  • Cleanup: Remove obsolete and unused code (3769791e3c, Florian Maurin)

Top Contributors

AuthorCommits
Florian Maurin1