RISC-V Software News

September 2026 — Upstream Open Source Activity

The Big Picture

A lighter September with 139 commits across 8 projects. The most active projects were QEMU (RISC-V) (56), OpenSBI (46), OpenOCD (RISC-V) (18). Extension support work touched Zicntr.

RISC-V International

RISC-V International is tracking 100 specifications, of which 54 have been ratified. Currently 12 are in the home stretch (freeze/stabilisation/ratification-ready), and 12 in planning. Across RISC-V International, 75 working groups are tracked — 56 actively meeting, 13 running at low activity. New groups being chartered: Performance Events TG, Parameters SIG, Serial Debug Protocol (RSDP) TG, Logic Analyzer Trace TG, Speculation Barriers TG . The spec repos saw 46 commits this month, led by ISA Manual with 44 commits.

Spec Pipeline Changes (since August 2026)

3 new specifications ratified this month.

  • Branch with Immediate (Zibi) — Freeze → Ratification-Ready

New specs entering the pipeline:

  • RV Worlds H-extension (Stabilization)
  • Vector Matrix Extension (VME) (Stabilization)
  • psABI (Planning)
  • Long Instruction (Inception)
  • RV Worlds scalability extension (Inception)

Specs removed from pipeline:

  • Data Trace of Multiple-Memory Access and Compare and Swap (was: Ratification-Ready)
  • Implicit Return (E-Trace 2.0) (was: Ratification-Ready)
  • RHTI trcstate Extension (was: Ratification-Ready)
  • RVA23.1 (was: Ratification-Ready)
  • RVB23.1 (was: Ratification-Ready)
  • Standard Support Packet extension to E-trace (was: Ratification-Ready)
  • CHERI (was: Freeze)
  • PMP-based Memory Types Extension (Smpmpmt) (was: Freeze)
  • RISC-V Worlds (Smwid, Smlwid, Smlwidlist, Smwiddeleg, Sswid) (was: Freeze)
  • CPU Utilization Counter Extension (Sscpuutil) (was: Planning)
  • ELF psABI (was: Planning)

Specification Pipeline (100 total, 54 ratified)

54
Ratified
12
in Planning
9
Inception
8
Cancelled
7
Under Stabilization
5
in Publication
4
in Freeze
1
in Ratification-Ready

Ratification-Ready (1)

Freeze (4)

Stabilization (7)

Planning (12)

Inception (9)

Spec Repository Activity

RepositoryCommitsContributors
ISA Manual 44 8
ELF psABI 2 1

Working Groups (75 total)

56
Active
13
Low Activity
8
Being Chartered

New Groups Being Chartered

  • Performance Events TG — chaired by Rajat Bhatia (Qualcomm)
  • Parameters SIG
  • Serial Debug Protocol (RSDP) TG — chaired by Anton Fogel (Lauterbach)
  • Logic Analyzer Trace TG — chaired by Sajosh Janarthanam (Tenstorrent)
  • Speculation Barriers TG — chaired by Ved Shanbhogue (Meta)
  • Automotive SIG — chaired by Thomas Roecker (Infineon)
  • Long Instruction TG — chaired by Stefan Wallentowitz (Individual Member)
  • JITed and Dynamic Languages SIG — chaired by Martin Maas (Google)

OpenSBI

46
Commits
14
Contributors
1291
Lines Added
728
Lines Removed

OpenSBI had a solid month with 46 commits from 14 contributors. Leading the charge was Carlos López with 14 commits. New feature work included 16 commits: "firmware: fw_base.S: add a formatted OpenSBI firmware header"; "Makefile: enable Thread Safety Analysis". Bug fixes accounted for 5 commits (10%). The interrupt subsystem got 2 patches of attention this month.

16 New features & support 5 Bug fixes 2 Interrupt controllers (AIA/APLIC/PLIC) 2 Cleanup & refactoring 1 KVM / Virtualisation 1 Device tree / platform support

Notable Changes

  • lib: sbi: dbtr: add platform device for per-slot trigger capabilities (and 2 more) (27d9545384, David E. Garcia Porras)
  • platform: generic/andes: fix 32-bit shift overflow in decode_pmaaddrx() (22a5f98b39, Randolph)
  • Makefile: don't grep when setting CC_SUPPORT_SAVE_RESTORE (and 2 more) (5b1e739428, Trevor Gamblin)
  • lib: sbi_domain: Introduce domain intialization order (and 2 more) (55b6b73435, Anup Patel)
  • lib: utils/andes: add the SMU and LLC registers to the root domain (4c5d9d9f93, Ben Zong-You Xie)
  • firmware: fw_base.S: add a formatted OpenSBI firmware header (1854901adc, Zong Li)
  • lib: utils/cache: fix andes_llcache_enable() return value (344428d832, Ben Zong-You Xie)
  • include: sbi: add thread safety analysis macros (8d109c7e87, Carlos López)
  • lib: sbi_sse: add TSA annotations (and 2 more) (8f80b2651f, Carlos López)
  • lib: sbi: Fix FP state enable in sbi_fp_save (7774b82e4a, whensun)
  • Makefile: enable Thread Safety Analysis (9476b78361, Carlos López)
  • lib: sbi_scratch: add TSA annotations (2d34c0e0e1, Carlos López)
  • lib: sbi_domain: add TSA annotations (8740e0a38c, Carlos López)
  • lib: sbi_pmu: Fix counter and event info error codes as per SBI v3.0 spec (and 2 more) (c5077d497d, David E. Garcia Porras)
  • lib: sbi_timer: add TSA annotations (f5fd674f18, Carlos López)

Top Contributors

AuthorCommits
Carlos López14
Ben Zong-You Xie8
David E. Garcia Porras6
Trevor Gamblin3
Zong Li3
Anup Patel3
Rahul Pathak2
Benoît Monin1
Shibo Zhu1
Chen Pei1

Notable Discussions

Mailing List Activity

QEMU (RISC-V)

56
Commits
14
Contributors
1778
Lines Added
1203
Lines Removed

QEMU (RISC-V) had a solid month with 56 commits from 14 contributors. Leading the charge was Joel Stanley with 20 commits. New feature work included 16 commits: "hw/riscv: Add property to hart array to allow private memory"; "hw/riscv/riscv-iommu-sys.c, virt.c: add riscv_create_iommu_sys()". Device tree and platform support saw 10 commits. AIA and interrupt controller work accounted for 5 patches. Bug fixes accounted for 4 commits (7%).

16 New features & support 10 Device tree / platform support 5 Interrupt controllers (AIA/APLIC/PLIC) 4 Bug fixes 2 ISA extensions 2 Cleanup & refactoring 1 KVM / Virtualisation

Notable Changes

  • hw/riscv/fdt_common, virt.c: add riscv_create_fdt_socket_aplic() (and 2 more) (2b5924462e, Daniel Henrique Barboza)
  • hw/riscv/device-common, virt.c: add riscv_gpex_pcie_init() (and 2 more) (459ad31d7e, Daniel Henrique Barboza)
  • hw/riscv/fdt-common, virt.c: add riscv_create_fdt_rtc() (and 5 more) (b5d3ae117b, Daniel Henrique Barboza)
  • hw/riscv/riscv-iommu-sys.c, virt.c: add riscv_create_iommu_sys() (5d9fafe653, Daniel Henrique Barboza)
  • hw/riscv: Add property to hart array to allow private memory (a091d4f91f, Portia Stephens)
  • target/riscv/tcg/debug: set tinfo version if sdtrig enabled (126bac6372, Daniel Henrique Barboza)
  • hw/riscv/virt: Use hwaddr for IMSIC device tree address (c3395130d3, Joel Stanley)
  • target/riscv/tcg/debug.c: add Debug 1.0 'pending' bit (99271da73e, Daniel Henrique Barboza)
  • semihosting: add callback to set error (ee601c629c, Matheus Tavares Bernardino)
  • target/riscv: prevent abrupt abortion on unassigned value write to tdata (055f9cb47d, Abhigyan Kumar)
  • hw/riscv/atlantis: Map the SoC through a memory container (and 9 more) (b23a62773a, Joel Stanley)
  • configure: re-purpose the tcg test compiler configs for vdso building (7e90d6e9ee, Alex Bennée)
  • target/riscv: Constify @iprio argument in riscv_cpu_pending_to_irq() (ae61514df0, Philippe Mathieu-Daudé)
  • hw/intc/riscv_aclint: Take a MemoryRegion for the created devices (4f717e46b6, Joel Stanley)
  • hw/intc/sifive_plic: Take a MemoryRegion for the created device (fe2b0ecfc8, Joel Stanley)

Top Contributors

AuthorCommits
Joel Stanley20
Daniel Henrique Barboza19
Pierrick Bouvier4
wangyang2
Philippe Mathieu-Daudé2
Anton Johansson1
Alex Bennée1
Marc-André Lureau1
Portia Stephens1
Abhigyan Kumar1

Notable Discussions

Mailing List Activity

glibc (RISC-V)

2
Commits
1
Contributors
13
Lines Added
3
Lines Removed

glibc (RISC-V) was quiet this month with 2 commits. Adhemerval Zanella dominated with 2/2 commits (100%).

1 Bug fixes 1 New features & support

Notable Changes

  • posix: Add POSIX posix_spawn_file_actions_add{,f}chdir (371d58d11b, Adhemerval Zanella)
  • Fix assert during static startup (BZ 33326) (99e9c5d1ca, Adhemerval Zanella)

Top Contributors

AuthorCommits
Adhemerval Zanella2

GDB (RISC-V)

4
Commits
2
Contributors
7
Lines Added
9
Lines Removed

GDB (RISC-V) was quiet this month with 4 commits from 2 contributors. Tom Tromey was the driving force, authoring 3 of 4 commits (75%).

1 Bug fixes 1 Cleanup & refactoring

Notable Changes

  • Return value_print_options from get_formatted_print_options (2400197555, Tom Tromey)
  • Use references for value_print_options (c9c30cbc82, Tom Tromey)
  • [gdb] Fix end-of-comment formatting (3e5100fe3b, Tom de Vries)
  • Convert get_user_print_options (727f0ef4d5, Tom Tromey)

Top Contributors

AuthorCommits
Tom Tromey3
Tom de Vries1

OpenOCD (RISC-V)

18
Commits
8
Contributors
224
Lines Added
105
Lines Removed

OpenOCD (RISC-V) kept moving with 18 commits from 8 contributors. Top contributor: Marc Schink with 5 commits. New feature work included 8 commits: "target: Add calculate_checksum command"; "drivers/ch347: support SRST in SWD mode".

8 New features & support 3 Bug fixes 1 Cleanup & refactoring

Notable Changes

  • target/smp: split target->smp into bool enable flag and unsigned int smp_id (10edeeda32, OpinionatedDeer)
  • target/arm_dap: Deprecate '-chain-position' and introduce '-tap' parameter (89748af516, Marc Schink)
  • target: Deprecate '-chain-position' and introduce '-tap' parameter (36621de504, Marc Schink)
  • pld: Deprecate '-chain-position' and introduce '-tap' parameter (6bfb4d2035, Marc Schink)
  • adapter/jlink: Deprecate USB address-based device selection (9e49d325cc, Marc Schink)
  • flash/nor: Add QSPI flash driver for max32xxx (43648fedd3, Henrik Mau)
  • drivers/ch347: support SRST in SWD mode (a6df9b87d5, Paulius Zaleckas)
  • target: Add calculate_checksum command (b04ccfeff7, Marc Schink)
  • flash/nor: add am13e230x flash driver (f3cedea436, Sameer Srivastava)
  • target/riscv: refactor scratch_reserve() - use standardized macros (c71aab122e, Jan Matyas)
  • target: deprecate 'fast_load' and 'fast_load_image' commands (95cd013e53, Antonio Borneo)
  • riscv: riscv_reg: simplify register name allocation (9ea6e95ef8, Antonio Borneo)
  • target/riscv: avoid flooding the log during poll (bd521b2221, Tomas Vanek)
  • target/riscv: remove RISCV_SCAN_DELAY_MAX (a98fc5ebe2, OpinionatedDeer)
  • target/riscv: fix compilation on old gcc (0cc2812da8, Tomas Vanek)

Top Contributors

AuthorCommits
Marc Schink5
Antonio Borneo4
Tomas Vanek2
Jan Matyas2
OpinionatedDeer2
Paulius Zaleckas1
Sameer Srivastava1
Henrik Mau1

musl libc (RISC-V)

2
Commits
2
Contributors
3
Lines Added
0
Lines Removed

A light month for musl libc (RISC-V) with 2 commits from 2 contributors.

Notable Changes

  • riscv32, riscv64: make alignment padding in ucontext_t explicit (47dd1f9c2b, Michael Forney)
  • riscv: clear fp and ra in _start like on other ports (691ba934ae, Alex Rønne Petersen)

Top Contributors

AuthorCommits
Alex Rønne Petersen1
Michael Forney1

OpenBLAS (RISC-V)

7
Commits
1
Contributors
507
Lines Added
177
Lines Removed

OpenBLAS (RISC-V) saw lighter activity with 7 commits. 6eanut was the driving force, authoring 7 of 7 commits (100%). Vector extension support moved forward with 2 commits.

2 Vector extension (RVV) 1 ISA extensions 1 New features & support

Notable Changes

  • kernel/riscv64: fold the complex MAC into the accumulators in ZGEMM (and 3 more) (687076430e, 6eanut)
  • RISC-V: register-block the ZVL256B GEMV-N kernel (and 2 more) (7b1ec93c47, 6eanut)

Top Contributors

AuthorCommits
6eanut7

Eigen (RISC-V)

4
Commits
2
Contributors
303
Lines Added
207
Lines Removed

Eigen (RISC-V) was quiet this month with 4 commits from 2 contributors. Florian Maurin was the driving force, authoring 3 of 4 commits (75%). Vector extension support moved forward with 1 commit.

1 Vector extension (RVV) 1 Bug fixes

Notable Changes

  • Skip redundant bfloat16 rounding round-trips and classify bfloat16 on its bits (4c9fc257bd, Charles Schlosser)
  • Core: Fix scalar complex GEMM accumulation on RVV (and 2 more) (688bc7a5cd, Florian Maurin)

Top Contributors

AuthorCommits
Florian Maurin3
Charles Schlosser1